Circuit and method for patching for program ROM
US7644223B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 30, 2006 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Dec 12, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention discloses a system comprising a first comparator circuit configured to assert a first control signal in response to a first input number matching one of a first numbers stored therein, a second comparator circuit configured to assert a second control signal in response to: (i) at least one latched assertion of the first control signal; (ii) a second input number matching an intermediate number produced by incrementing the first input number; and (iii) an assertion of an input signal, and to de-assert the second control signal absent of either the matching between the second input number and the intermediate number or the de-assertion of the input signal, and a generator circuit configured to output a predetermined instruction data stored therein in response to the assertion of the first control signal, and to output a third number in response to the assertions of the second control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.