Patent · US Active

SONOS flash memory and method for fabricating the same

US7648882B2 · kind B2 · utility

2Cited by
10References
7Claims
0Family size

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Key dates

Filing dateAug 19, 2007
Grant dateJan 19, 2010
Priority date
Expiry dateFeb 27, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/037

Abstract

A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory includes preparing a silicon substrate including a silicon oxide-silicon nitride-silicon oxide (ONO) layer, a first polysilicon layer and a first etch stop layer in sequence; etching the first etch stop layer along a direction of bit line; selectively etching the first polysilicon layer with the first etch stop layer as a mask, till the silicon oxide-silicon nitride-silicon oxide (ONO) layer is exposed, the etched first polysilicon layer having an inverse trapezia section along a direction of word line; and filling a dielectic layer between portions of the first polysilicon layer, the dielectric layer having a trapezia section along the direction of word line. After the above steps, it becomes easier to remove the portion of the first polysilicon layer on a sidewall of the dielectric layer by vertical etching. Thus, no polysilicon residue will be formed on the sidewall of the dielectric layer, and the short circuit between different memory cells may be avoided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.