Plasma display panel
US7649314B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2006 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jan 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2211/368
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A plasma display panel reduces a resonance space between a frit and dummy partition walls so as to suppress noise and smoothly supply and exhaust a discharge gas. The plasma display panel includes a front substrate and a rear substrate that face each other, address electrodes and display electrodes that are spaced apart from each other and each extend along directions intersecting each other between the front substrate and the rear substrate, and partition walls that form a display region while partitioning a plurality of discharge cells and form a non-display region along a periphery of the display region between the front substrate and the rear substrate. The non-display region includes a first dummy area in which dummy cells are partitioned by dummy partition walls extending from partition walls disposed in the display region, and a second dummy area in which dummy cells are partitioned by dummy partition walls spaced apart from the first dummy area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.