Patent · US Active

Logic with state retentive sleep mode

US7649385B2 · kind B2 · utility

0Cited by
6References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 7, 2006
Grant dateJan 19, 2010
Priority date—
Expiry dateAug 7, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0016
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Embodiments disclosed herein provide sleep mode solutions for retaining state information while reducing power in a logic block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.