Low-power column parallel cyclic analog-to-digital converter
US7649488B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 25, 2008 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jun 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/806
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A low-power column parallel cyclic analog-to-digital converter and an imaging device using the same. The analog-to-digital converter comprises one stage and is optimized to reduce power, noise and capacitor settling time. The one stage analog-to-digital converter comprises a multiplying circuit for performing a multiplication operation during conversion phases and a sub-analog-to-digital converter connected to receive analog output signals from the multiplying circuit. The sub-analog-to-digital converter converts, during the conversion phases, the analog output signals into portions of an N-bit digital code. The multiplying circuit switches configurations between conversion phases and uses the portions of the digital code during the conversion phases to generate new analog output signals for subsequent conversion by the sub-analog-to-digital converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.