High speed interface for non-volatile memory
US7650459B2 · kind B2 · utility
15Cited by
0References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 21, 2006 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jan 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the invention connect multiple non-volatile memory controllers in a daisy chain manner, so the multiple memory devices may be accessed from a common host controller. Data and control signals may be daisy-chained in this way, so that many memory devices may be connected together, while not increasing the loading on individual signals lines. Transfer with the various memory devices may be interleaved, so that the relatively slow times of the memory devices doesn't slow down the overall throughout of the memory stem.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.