Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems
US7650558B2 · kind B2 · utility
15Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2005 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jan 30, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention are generally directed to systems, methods, and apparatuses for using the same memory type for both error check and non-error check systems. In an embodiment, a memory device is capable of operating in an error check mode and in a non-error check mode. The memory device includes an output having N error check bit paths for every M data bit paths. In one embodiment, the memory device is to transfer N error check bits with a corresponding M data bits, if the memory device is operating in an error check mode. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.