Slew-rate control circuitry with output buffer and feedback
US7652511B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2008 |
| Grant date | Jan 26, 2010 |
| Priority date | — |
| Expiry date | Jul 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0286
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention proposed a slew-rate control circuitry without the use of external components such as amplifiers. Therefore slew-rate control circuitry of the present invention not only provides an IC with build-in slew-rate control, but also reduces number of transistors used externally which will increase gate-oxide reliability of the IC. The slew-rate control circuitry of the present invention is primarily comprised by an output buffer and feedback circuitry, the output buffer mainly consisted four transistors and depends on output of the IC, these four transistors will interact with each other to control the slew-rate of IC output. Additional feedback circuitry and gate-tracking circuitry are also disclosed to enhance the performance of the slew-rate control circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.