On-chip bypass capacitor and method of manufacturing the same
US7655518B2 · kind B2 · utility
3Cited by
14References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2006 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Feb 11, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/42
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An on-chip bypass capacitor and method of manufacturing the same, the on-chip bypass capacitor including at least two capacitor arrays, each capacitor array including a first layer connecting the at least two capacitor arrays in series, each capacitor array including a plurality of capacitors, each of the plurality of capacitors including a second layer connecting the plurality of capacitors in parallel. The on-chip bypass capacitor may be part of a chip which also includes a memory cell array including at least one cell capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.