Testing method using a scalable parametric measurement macro
US7656182B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2007 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Mar 21, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/30
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed are testing method embodiments in which, during post-manufacture testing, parametric measurements are taken from on-chip parametric measurement elements and used to optimize manufacturing in-line parametric control learning and/or to optimize product screening processes. Specifically, these post-manufacture parametric measurements can be used to disposition chips without shipping out non-conforming products, without discarding conforming products, and without requiring high cost functional tests. They can also be used to identify yield sensitivities to parametric variations from design and to provide feedback for manufacturing line improvements based on the yield sensitivities. Additionally, a historical database regarding the key parameters that are monitored at both the fabrication and post-fabrication levels can be used to predict future yield and, thereby, to preemptively improve the manufacturing line and/or also to update supply chain forecasts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.