Multi-channel communication circuitry for programmable logic device integrated circuits and the like

US7656187B2 · kind B2 · utility

Assignee

• Altera Corporation · US

Inventors

• Thungoc M. Tran · San Jose, US
• Sergey Shumarayev · Los Altos Hills, US
• Tim Tri Hoang · San Jose, US
• Ning Xue · Fremont, US
• Chong H. Lee · San Ramon, US
• Ramanand Venkata · San Jose, US

Key dates

• Filing date: Nov 28, 2005
• Grant date: Feb 2, 2010
• Expiry date: Apr 23, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K19/17744
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An integrated circuit like a programmable logic device (“PLD”) includes multiple channels of data communication circuitry. Circuitry is provided for selectively sharing signals (e.g., control-type signals) among these channels in groupings of various size so that the device can better support communication protocols that require various numbers of channels (e.g., one channel operating relatively independently, four channels working together, eight channels working together, etc.). The signals shared may include a clock signal, a FIFO write enable signal, a FIFO read enable signal, or the like. The circuit arrangements are preferably modular (i.e., the same or substantially the same from one channel to the next and/or from one group of channels to the next) to facilitate such things as circuit design and verification.