Phase-locked loop circuit
US7656206B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2007 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Mar 20, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/113
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage controlled oscillator 8 is configured to include a plurality of variable delay circuits 30 that are connected to one another so as to form a ring. Output fixing units 31 each of which fixes, when the voltage controlled oscillator 8 stops operating, the output of a corresponding one of the variable delay circuits 30 are provided. As a result, even if the voltage controlled oscillator 8 that operates by following the frequency of an input clock has changed into an operation stop state, because the output fixing units 31 fix the outputs of the variable delay circuits 30, the output of the voltage controlled oscillator 8 is prevented from being in an inconstant state. Thus, it is possible to ensure that the voltage controlled oscillator 8 oscillates properly when the voltage controlled oscillator 8 resumes or starts its operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.