Noise canceling technique for frequency synthesizer
US7656236B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 15, 2007 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Dec 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/107
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer is disclosed. According to one embodiment, the frequency synthesizer includes an input terminal and an output terminal, a loop filter, a digital phase detector, and an analog phase detector. The digital phase detector includes a first input coupled to the input terminal, a second input coupled to the output terminal, and an output coupled to the loop filter, the digital phase detector is configured to operate at a first phase comparison frequency. The analog phase detector includes a first input coupled to the input terminal, a second input coupled to the output terminal, and an output alternating current (AC) coupled to the loop filter, the analog phase detector is configured to operate at a second phase comparison frequency. The first phase comparison frequency is different from the second phase comparison frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.