Scalable integrated circuit high density capacitors
US7656643B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2007 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Jan 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides several scalable integrated circuit high density capacitors and their layout techniques. The capacitors are scaled, for example, by varying the number of metal layers and/or the area of the metal layers used to form the capacitors. The capacitors use different metallization patterns to form the metal layers, and different via patterns to couple adjacent metal layers. In embodiments, optional shields are included as the top-most and/or bottom-most layers of the capacitors, and/or as side shields, to reduce unwanted parasitic capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.