Semiconductor storage device
US7656732B2 · kind B2 · utility
7Cited by
2References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 13, 2008 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Aug 22, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor storage device, such as a dynamic random access memory (DRAM), in which dynamic data is amplified and read on a bit line, a data line sense amplifier/write buffer connected to a data line of a memory array and a data line sense amplifier control signal generating logic circuit connected to a dummy data line of a dummy memory array are provided. A sense amplifier is activated in accordance with an output signal of the logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.