Clock signal generation techniques for memories that do not generate a strobe
US7656743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2006 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | May 10, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure describes a clock circuit for a memory controller. The described circuit uses a processor clock signal to generate an input clock signal for use during write operations to the memory, or to generate a feedback clock signal for use during read operations from the memory. The circuit is particularly applicable to mobile wireless devices that include memories that do not generate a strobe. The clock circuit may comprise a driver in series with a resistor element that generates an input clock signal for input to a memory, and a resistor-capacitor (RC) filter in series with a receiver that generates a feedback clock signal for output from the memory, wherein an input to the RC filter is tapped between the driver and the resistor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.