Apparatus and method for aggregation and transportation of gigabit ethernet and other packet based data formats
US7656905B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Dec 24, 2003 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Nov 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/245
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The invention provides an apparatus and method for transparently transporting four plesiochronous Gigabit Ethernet, Fibre Channel or other packet-based data signals over a network. Multiple plesiochronous Gigabit Ethernet data streams are aggregated onto an independent clock source at an ingress circuit through the use of transparent IDLE character insertion. The independent clock is selected such that the output data rate is greater than the composite input data rate of all the plesiochronous data streams. The signals are encapsulated with forward error correction and mapped to a reciprocal FEC interface prior to transport. An egress circuit at the receiving end recovers the modulated signal and extracts the data stream. Each independent data stream is mapped to a local clock domain via IDLE character insertion or removal. Therefore, the input and output signals are transparent and identical in content.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.