Radio receiver, system on a chip integrated circuit and methods for use therewith
US7656968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Jul 25, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2215/065
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system on a chip integrated circuit includes an analog front end for receiving a received radio signal having a plurality of channel signals, each of the plurality of channel signals being modulated at one of a corresponding plurality of carrier frequencies, and for converting a selected one of the plurality of channel signals into a digital signal. A digital clock generator generates a digital clock signal at a digital clock frequency that varies based on the selected one of the plurality of channel signals. The digital clock frequency, and integer multiples of the digital clock frequency, are not substantially equal to the carrier frequency of the selected one of the plurality of channel signals. A digital section converts the digital signal into at least one audio signal that corresponds to the selected one of the plurality of channels, based on the digital clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.