DSP-based data recovery
US7656982B2 · kind B2 · utility
16Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2004 |
| Grant date | Feb 2, 2010 |
| Priority date | — |
| Expiry date | Dec 21, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2562
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A bit clock recovery apparatus for digital storage readout employing sync frames, where an oversampled readout signal is stored in memory, sync patterns are located in the signal using DSP means, distances of consecutive sync pattern locations are calculated, and bit clock is recovered from these distances and the knowledge about the data framing structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.