Method and apparatus to ensure consistency of depth values computed in different sections of a graphics processor
US7659893B1 · kind B1 · utility
16Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2006 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Mar 13, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
At least two different processing sections in a graphics processors compute Z coordinates for a sample location from a compressed Z representation. The processors are designed to ensure that Z coordinates computed in any unit in the processor are identical. In one embodiment, the respective arithmetic circuits included in each processing section that computes Z coordinates are “bit-identical,” meaning that, for any input planar Z representation and coordinates, the output Z coordinates produced by the circuits are identical to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.