Multibit ROM memory
US7660143B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2008 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Aug 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5617
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention concerns a ROM comprising a set of memory points arranged in rows and columns, each memory point capable of storing two bits of data and comprising a single switch controllable to connect together first and second terminals of said switch, each of said first and second terminals being connected to one of first, second and third conductive lines, wherein said switch is connected via said first and second terminals between said first and second lines to encode a first data value, between said first and third lines to encode a second data value, between said second and third lines to encode a third data value, and both of said first and second terminals being connected to the same one of said first, second and third lines to encode a fourth data value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.