Semiconductor memory for disconnecting a bit line from a sense amplifier in a standby period and memory system including the semiconductor memory
US7660184B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 24, 2007 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Oct 10, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4067
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control circuit controls an operation of the precharge switches and sets a cutoff function that turns off connection switches in a standby period in which no access operation of the memory cells is performed. Since connections of the bit lines and the precharge switch and those of the bit lines and the sense amplifier are cut off in the standby period, if a short circuit failure is present between a word line and a bit line, a leak current can be prevented from flowing from the word line to a precharge voltage line and so on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.