Block-based data striping to flash memory
US7660911B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2007 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Apr 1, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In various embodiments, options for data striping to FLASH memory are provided. In one embodiment, an apparatus is provided. The apparatus includes an SATA to ATA bridge, an ATA to USB bridge coupled to the SATA to ATA bridge, and a USB interface coupled to the ATA to USB bridge. The apparatus also includes a first FLASH memory controller coupled to the USB interface. The apparatus further includes a first FLASH memory module coupled to the first FLASH memory controller. The apparatus also includes a second FLASH memory controller coupled to the USB interface and a second FLASH memory module coupled to the second FLASH memory controller. A method for block striping data to or from a plurality of read or write channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.