System on a chip for networking
US7660931B2 · kind B2 · utility
9Cited by
1References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2008 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Jul 23, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/387
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.