High-voltage PMOS transistor
US7663203B2 · kind B2 · utility
5Cited by
10References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2005 |
| Grant date | Feb 16, 2010 |
| Priority date | — |
| Expiry date | Jun 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a high-voltage PMOS transistor having an insulated gate electrode (18), a p-conductive source (15) in an n-conductive well (11), a p-conductive drain (14) in a p-conductive well (12) which is arranged in the n-conductive well, and having a field oxide area (13) between the gate electrode and drain, the depth (A′-B′) of the n-conductive well underneath the drain (14) is less than underneath the source (15), and the depth (A′-B′) of the p-conductive well is greatest underneath the drain (14).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.