Patent · US Active

Phase-locked loop circuit

US7663417B2 · kind B2 · utility

1Cited by
8References
9Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJan 9, 2008
Grant dateFeb 16, 2010
Priority date
Expiry dateFeb 21, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/1072
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A phase-locked loop circuit comprises a phase frequency detector, a charge pump associated with a loop capacitance, and a voltage controlled oscillator. The phase frequency detector receives a reference clock signal on a first input and a feedback signal from the voltage controlled oscillator on a second input. The charge pump receives control inputs from outputs of the phase frequency detector. Pulse duration detecting circuitry limits charge and discharge current pulses supplied to the loop capacitance by the charge pump to durations less than predetermined permissible durations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.