System and method for transferring data among transceivers substantially void of data dependent jitter
US7664214B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2002 |
| Grant date | Feb 16, 2010 |
| Priority date | — |
| Expiry date | Jun 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication system, clock generation circuit, and method are provided for receiving jitter upon data and to generate a clock reference that does not contain the received jitter. The clock reference can be used either by a digital subsystem of a communication system node, or can be transmitted as substantially jitter-free data from that node to a downstream node of the communication system. Instead of recovering the clock reference from the data having jitter, a pattern is regularly defined within the data stream preferably at periodic, timed intervals. The data pattern may be made up of a series of non-transitions which, regardless of any jitter in the data itself, does not impute any jitter onto a phase-locked loop triggered from an edge of the non-transitioning data pattern. Using the edge as a reference point, a jitter-free clocking signal can be derived at the same frequency as a clocking signal which would normally be produced from the jitter-induced data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.