Flash memory access apparatus and method
US7664906B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2004 |
| Grant date | Feb 16, 2010 |
| Priority date | — |
| Expiry date | Jun 20, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory access apparatus and method improves the overall performance of a flash memory system by minimizing the deterioration of performance of a flash memory due to repeated write operations through a minimized process of a write operation and the process of a recovery operation in consideration thereof and by allowing a stable recovery even though an error occurs. The flash memory access apparatus comprises a flash memory with regions divided on the basis of a unit that consists of predetermined blocks; and a flash memory controller. When a write operation is requested for a specific logical block number of the flash memory, the flash memory controller writes data and meta-information in a physical block corresponding to a logical block with the logical block number in the absence of a previous write operation for the logical block, but performs a write operation for writing the data and the meta-information allocated to the logical block in a new physical block without changing flash memory state information written in a previous physical block corresponding to the logical block in case of the presence of the previous write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.