Patent · US Active

Method and device for classifying cells in a layout into a same environment and their use for checking the layout of an electronic circuit

US7665051B2 · kind B2 · utility

192Cited by

3References

16Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Burkhard Ludwig · Birkenfeld, DE
Uwe Mueller · Cleebronn, DE

Key dates

Filing date	Aug 1, 2007
Grant date	Feb 16, 2010
Priority date	—
Expiry date	Feb 12, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/398
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and a device can be used for checking the layout of an electronic circuit of a semiconductor component. For example, the method includes an automatic classification of cells in at least one layout into a cell database, and an automatic layout checker comparing the cell database to a layout to be checked.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.