Methods of fabricating semiconductor devices including transistors having recessed channels
US7666743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2007 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Jul 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
Semiconductor devices including an isolation layer on a semiconductor substrate are provided. The isolation layer defines an active region of the semiconductor substrate. The device further includes an upper gate electrode crossing over the active region and extending to the isolation layer and lower active gate electrode. The lower active gate electrode includes a first active gate electrode extending from the upper gate electrode to the active region and a second active gate electrode below the first active gate electrode and having a greater width than a width of the first active gate electrode. The device further includes a lower field gate electrode that extends from the upper gate electrode to the isolation layer and has a bottom surface that is at a lower level than a bottom surface of the active gate electrode such that the sidewalls of the active region are covered below the lower active gate electrode. Related methods of fabricating semiconductor devices are also provided herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.