Semiconductor device including active pattern with channel recess, and method of fabricating the same
US7667266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2008 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | May 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0142
Abstract
A semiconductor device including an active pattern having a channel recess portion, and a method of fabricating the same, are disclosed. In one embodiment, the semiconductor device includes an active pattern including first active regions and a second active region interposed between the first active regions. The active pattern protrudes above a surface of a semiconductor substrate and includes a channel recess portion above the second active region and between the first active regions. A device isolation layer surrounds the active pattern and has a groove exposing side walls of the recessed second active region. A distance between opposing side walls of the first active regions exposed by the channel recess portion is greater than a distance between side walls of the groove. A gate pattern is located in the channel recess portion and extends along the groove.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.