Voltage shifter circuit
US7667490B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2008 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | May 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a voltage shifter circuit, in which a control circuit is used to control the pull-up circuit, so that the pull-up circuit is kept as off when the signal from the input signal source changes from a low voltage to a high voltage. Hence, the competition between the pull-up circuit and the pull-down circuit is avoided. The speed of the voltage shifter circuit is improved and the voltage shifter circuit can operate within a wider voltage range. The delay time of the pull-up circuit and the pull-down circuit is small and the duty cycle is small. In addition, since no direct current path is established, no current is wasted. Additionally, the voltage shifter circuit uses the second delayer to compensate the delay time between the pull-up circuit and the pull-down circuit and optimizes the duty cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.