Time delay apparatus and method of using same
US7667515B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2008 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | May 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00176
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a time delay generator 200 apparatus and method. The apparatus includes a time delay gate 212, a mixer 216 (a Gilbert cell circuit), and a current digital to analog converter 206. The mixer 216, comprised of first and second transistor differential pairs 218 and 220, receives an analog input signal 202 without a delay as well as a delayed input signal 210 produced by the time gate delay. The digital to analog converter regulates the relative current flow between a first control signal 232 and a second control signal 238, effectively altering the mixing of the undelayed input signal 208 and the delayed input signal 210 to generate a delayed output signal 214 with a time or phase delay substantially equal to the temporal delay represented by the digital signal input 204. The time delay generator exhibits reduced phase noise and a linear time delay response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.