High-performance LDPC coding for digital communications in a multiple-input, multiple-output environment
US7668248B2 · kind B2 · utility
27Cited by
4References
10Claims
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Key dates
| Filing date | Oct 18, 2006 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Jul 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2626
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Transceiver circuitry for use in a multiple-input, multiple-output (MIMO), orthogonal frequency-division multiplexing (OFDM), communications environment, is disclosed. Error correction coding according to a fixed-block size code, such as low density parity check (LDPC) coding, is implemented. A specific LDPC code with excellent error rate performance is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.