Generic maximum aposteriori probability decoder for use in software-defined radio systems
US7669105B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2006 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Aug 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6561
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reconfigurable maximum a-posteriori probability (MAP) calculation circuit that reuses the arithmetic logic unit (ALU) hardware to calculate forward state metrics (alpha values), backward state metrics (beta values), and extrinsic information (lambda values) for the trellis associated with the MAP algorithm. The alpha, beta and lambda calculations may be performed by the same ALU hardware for both binary code (i.e., WCDMA mode) and duo-binary code (i.e, WiBro mode).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.