Semiconductor integrated circuit device having improved punch-through resistance and production method thereof, semiconductor integrated circuit device including a low-voltage transistor and a high-voltage transistor
US7671384B2 · kind B2 · utility
5Cited by
7References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2005 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Nov 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device comprises a memory cell well formed with a flash memory device, first and second well of opposite conductivity types for formation of high voltage transistors, and third and fourth wells of opposite conductivity types for low voltage transistors, wherein at least one of the first and second wells and at least one of the third and fourth wells have an impurity distribution profile steeper than the memory cell well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.