Class-D amplifier
US7671673B2 · kind B2 · utility
1Cited by
3References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 20, 2007 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Jan 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/2175
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A PWM modulator adds first and second input signals to each other, and performs PWM modulation processing for outputting a PWM-modulated pulse whose pulse width is modulated according to a result of addition. A shift register delays a bit stream acquired from a ΔΣ modulator, thereby generating two bit streams having a time difference which is one-half a period of PWM modulation processing, and the bit streams are supplied at first and second input signals to the PWM modulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.