System and method for reducing power consumption in a multi-channel signal processor
US7671779B1 · kind B1 · utility
3Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 3, 2007 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Mar 28, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1295
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An analog front end for a multi-channel signal processor is provided. The analog front end includes a first stage that is operable to receive a plurality of channel inputs. The first stage includes a ping/pong capacitor array corresponding to each of the channel inputs and an operational amplifier that may be coupled successively to each of the ping/pong capacitor arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.