Radio receiver, system on a chip integrated circuit and methods for use therewith
US7672403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Jan 18, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J1/0008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system on a chip integrated circuit includes a first in-phase digital submodule and a first quadrature phase digital submodule such that the first in-phase digital submodule and the first quadrature phase digital submodule are operable to produce at least one output signal based on at least one input signal. A digital clock generator generates a first in-phase digital clock signal having a plurality of first in-phase digital clock cycles over a predetermined period and a first quadrature phase digital clock signal having a plurality of first quadrature phase digital clock cycles over the predetermined period. The plurality of first in-phase digital clock cycles are substantially interleaved with the plurality of first quadrature phase digital clock cycles over the predetermined period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.