Transistor having high dielectric constant gate insulating layer and source and drain forming Schottky contact with substrate
US7674680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2004 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Oct 5, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention is directed to a device for regulating the flow of electric current with high dielectric constant gate insulating layer and a source and/or drain forming a Schottky contact or Schottky-like region with a substrate and its fabrication method. In one aspect, the gate insulating layer has a dielectric constant greater than the dielectric constant of silicon. In another aspect, the current regulating device may be a MOSFET device, optionally a planar P-type or N-type MOSFET, having any orientation. In another aspect, the source and/or drain may consist partially or fully of a silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.