Configuration setting circuit and configuration setting method thereof
US7675318B2 · kind B2 · utility
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2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2008 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Mar 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1733
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A configuration setting circuit and the method thereof, in which the configuration setting circuit includes a clock generator, a plurality of terminals, and a frequency detector coupled to a terminal. The clock generator is used to generate multiple clock signals with different frequencies, and output through the terminals. One input signal is inputted to the frequency detector through the terminal coupled to the frequency detector, so that the frequency detector can output at least two-bit configuration signal corresponding to the frequency of the input signal to set the operation mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.