Patent · US Active

Combined volatile nonvolatile array

US7675775B2 · kind B2 · utility

4Cited by

5References

21Claims

0Family size

Assignee

Cypress Semiconductor Corporation · US

Inventors

Andreas Scade · Dresden, DE
Stefan Guenther · Lake Orion, US

Key dates

Filing date	Dec 5, 2007
Grant date	Mar 9, 2010
Priority date	—
Expiry date	Dec 30, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C14/0063
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory circuit includes volatile memory cells coupled to bit lines, and nonvolatile memory cells coupled to the volatile memory cells via the bit lines but not via complement bit lines.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.