Parallel channel architecture

US7675908B2 · kind B2 · utility

Inventors

• Shaun Clem · Thousand Oaks, US
• Todd Khacherian · Moorpark, US
• Darrin Patek · Thousand Oaks, US
• Jimmy Pu · Cerritos, US
• Chris Reed · Reno, US
• John Wallner · Calabasas, US

Key dates

• Filing date: May 3, 2006
• Grant date: Mar 9, 2010
• Expiry date: Dec 27, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04Q2213/13341
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

A high data rate switch is disclosed. The switch may include fiber optic channels where a plurality of switching elements necessarily operate at a significantly lower data rate providing routing of variable or fixed size data packets from a plurality of source ports to a plurality of destination ports via a single serial link. This is may be provided by storing the high rate data temporarily in memory in each of the source ports and then downloading it at a lower rate in a complete data packet to a designated switching element, almost immediately distributing the next data packet that has been received by the source port to a next switching element. The switching element configuration provides automatic redundancy and a minimum amount of frame overhead while sustaining throughput at the high data rate.