Processing system and method for transform
US7676532B1 · kind B1 · utility
3Cited by
2References
54Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 4, 2006 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Jan 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes M memories, wherein a first mapping assigns each point of an N-point input sequence to one of the M memories. A pipelined data path receives an input from each of the M memories, stores an output to each of the M memories, and iteratively processes pairs of points of the N-point input sequence. A control module designates the pairs of points from the M memories for processing by the data path, wherein only one point of each of the pairs is designated at one time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.