Stabilization for random chip identifier circuit
US7676726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2006 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Jan 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of stabilizing an identification series of bits by iteratively reading the identification series and logical OR'ing the identification series with a mask string after each read of the identification series. This produces a mask string having a first value in all positions of the mask string where bits in the identification series have never changed value during all of the readings of the identification series, representing stable bits, and a second value in all positions of the mask string where bits in the identification series have changed value during at least one of the readings of the identification series, representing unstable bits. The number of the unstable bits in the mask string having the second value is counted, and a method failure code is selectively reported when the number of unstable bits exceeds a maximum allowable number of unstable bits. An identification string is produced from the stable bits, and an identification code is calculated from the identification string. The identification code does not disclose the identification string, but is able to confirm the accuracy of the identification string and selectively correct a given number of bits within …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.