Method of processing a circuit board
US7676920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2006 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Sep 11, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A test coupon on a printed circuit board used for verifying that vias in the printed circuit board are back drilled to a proper predetermined depth. Use of the coupon involves correlating a via on the board to a via of a test coupon drilling the board via and the test coupon via to substantially the same depth, where the depth is predetermined based on the board via. Then measuring the impedance of the test coupon to reveal the actual depth of the back drilling of the coupon via. Knowing the actual back drill depth of the coupon via is used to verify the back drill depth of the board via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.