Patent · US Active

Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure

US7679120B2 · kind B2 · utility

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5References
4Claims
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Assignee

Inventors

Key dates

Filing dateAug 31, 2006
Grant dateMar 16, 2010
Priority date
Expiry dateMay 20, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/485
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure having a plurality of gate stacks on a semiconductor substrate provided with a gate dielectric. The gate stacks have a lower first layer made of polysilicon, an overlying second layer made of a metal silicide, and an upper third layer made of an insulating material, and a sidewall oxide on the sidewalls of the first and second layers. The sidewall oxide is thinned or removed on one of the sidewalls, and the gate stacks have sidewall spacers made of the insulating material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.