Semiconductor device comprising fuse sections
US7679161B2 · kind B2 · utility
0Cited by
3References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2006 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Nov 15, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a semiconductor device includes a first fuse cutting portion in which fuse lines are arranged transversely adjacent to each other, a first runner portion in which runner lines connected to the fuse lines are arranged transversely adjacent to each other but at smaller intervals than those of the fuse lines, and a first connection portion having connection lines between the fuse lines and the runner lines. An insulating barrier layer covers the connection portions so that post-process residues from fuse cutting do not cause electrical shorts between the closely formed runner lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.