High speed integrated circuit
US7679396B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Oct 4, 2008 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Oct 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0948
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and apparatus are disclosed for implementing low noise circuits. The method includes providing a first subcircuit and a second subcircuit, where the first subcircuit and the second subcircuit include substantially same circuit elements and have substantially same configuration and layout, providing one or more coupling capacitors configured to couple between a circuit power and a circuit ground that power the first subcircuit and the second subcircuit, providing one or more pairs of differential input signals to the first subcircuit and the second subcircuit, where the first subcircuit receives a differential signal and the second subcircuit receives a complement of the differential signal, operating the first subcircuit and the second subcircuit to generate one or more pairs of differential output signals using the one or more pairs of differential input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.