Comparator and analog-to-digital converter using the same
US7679428B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2008 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Jul 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/249
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.